AO4202L 30v n-channel mosfet general description product summary v ds i d (at v gs =10v) 19 a r ds(on) (at v gs =10v) < 5.3m ? r ds(on) (at v gs = 4.5v) < 7m ? 100% uis tested 100% r g tested symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r jl w 3.1 maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 16 75 24 maximum junction-to-ambient a t a =25c t a =70c power dissipation b p d avalanche energy l=0.1mh c pulsed drain current c continuous drain current t a =25c a i d 19 15 130 mj avalanche current c 72 a 38 the AO4202L uses trench mosfet technology that is uniquely optimized to provide the most efficient high frequency switching performance. power losses are minimized due to an extremely low combination of r ds(on) and c rss . in addition, switching behavior is well controlled with a ?schottky style? soft recovery body diode. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 30v v 20 gate-source voltage drain-source voltage 30 c/w r ja 31 59 40 c thermal characteristics units parameter typ max 2 t a =70c junction and storage temperature range -55 to 150 g d s soic-8 g s d rev 1 : dec 2009 www.aosmd.com page 1 of 6
ao4402l symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.3 1.8 2.3 v i d(on) 130 a 4.4 5.3 t j =125c 6.5 5.5 7 m ? ? q g (10v) 23 29 35 nc q g (4.5v) 10 13 16 nc q gs 3 4.2 5 nc q gd 2.5 4.2 6 nc t d(on) 6.5 ns t r 7ns t d(off) 21 ns t f 3.5 ns t rr 12 15 18 ns q rr 25 32 38 nc this product has been designed and qualified for the consumer market. applications or uses as critical components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery time drain-source breakdown voltage on state drain current i d =250 a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =19a reverse transfer capacitance i f =19a, di/dt=500a/ s v gs =0v, v ds =15v, f=1mhz switching parameters electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss a v ds =v gs i d =250 a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current forward transconductance diode forward voltage r ds(on) static drain-source on-resistance m ? i s =1a,v gs =0v v ds =5v, i d =19a v gs =4.5v, i d =15a gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge v gs =10v, v ds =15v, i d =19a gate source charge gate drain charge total gate charge body diode reverse recovery charge i f =19a, di/dt=500a/ s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =0.75 ? , r gen =3 ? a . the value of r ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junction temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initialt j =25c. d. the r ja is the sum of the thermal impedence from junction to lead r jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperature of t j(max) =150c. the soa curve provides a single pulse rating. rev 1 : dec 2009 www.aosmd.com page 2 of 6
AO4202L typical electrical and thermal characteristic s 17 5 2 10 0 18 40 0 20 40 60 80 100 1 1.5 2 2.5 3 3.5 4 v gs (volts) figure 2: transfer characteristics (note e) i d (a) 0 2 4 6 8 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m ? ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 v sd (volts) figure 6: body-diode characteristics (note e) i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =4.5v i d =15a v gs =10v i d =19a 0 5 10 15 20 246810 v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m ? ) 25c 125c v ds =5v v gs =4.5v v gs =10v i d =19a 25c 125c 0 20 40 60 80 100 012345 v ds (volts) fig 1: on-region characteristics (note e) i d (a) v gs =2.5v 3.5v 5v 6v 10v 3v rev 1: dec 2009 www.aosmd.com page 3 of 6
AO4202L typical electrical and thermal characteristic s 0 2 4 6 8 10 0 5 10 15 20 25 30 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 500 1000 1500 2000 2500 3000 0 5 10 15 20 25 30 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss c oss c rss v ds =15v i d =19a 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 11: single pulse power rating junction-to-ambient (note f) power (w) t a =25c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 v ds (volts) i d (amps) figure 10: maximum forward biased safe operating area (note f) 10 time in avalanche, t a ( s) figure 12: single pulse avalanche capability (note c) i ar (a) peak avalanche current t a =25c t a =150c t a =100c t a =125c rev 1: dec 2009 www.aosmd.com page 4 of 6
AO4202L typical electrical and thermal characteristic s 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 12: normalized maximum transient thermal impedance (note f) z ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z ja .r ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r ja =75c/w rev 1: dec 2009 www.aosmd.com page 5 of 6
AO4202L - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms tt r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 1: dec 2009 www.aosmd.com page 6 of 6
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